INTRODUCTION
WHY DO WE NEED NEW STRESS TEST METHODS ?
THERMAL OVEN / LIQUID TO LIQUID
/ SAND BATH / SOLDER FLOAT
Industry wide studies over the last ten years have concluded that traditional methods are:
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Too Slow
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Non Repeatable/Reproducible
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Difficult to correlate between methods
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Difficult to characterize and does not simulate the products expected assembly/environmental conditions.
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Too expensive
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Extensive microsectioning required
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Difficult data analysis & interpretation
The challenge was to find an accelerated stress test method that solved the above concerns.
Interconnect Stress Test (IST) Technology has
emerged as the future test methodology for the assessment of Printing Wiring Board
(PWB) interconnect. IST has the capability of effectively/rapidly quantify the integrity of both the Plated Through Hole
(PTH) and the unique ability to identify the presence & levels of post separations within the multilayer board
(MLB). IST both compliments and/or dramatically reduces the levels of microsection analysis required for PWB interconnect quality assessment.
This is supported by excellent correlation with traditional test methods and microsectioning techniques. Following several years of intense evaluation, the
I.P.C. have approved the IST technology as the first electrical test methodology for assessing plated through hole integrity and for the detection of post separation. The IST methodology
is now part of the IPC 650 Test Methods Manual.
The IST principles are unique in that they simultaneously quantify the integrity of both the PTH and its interconnections to the internal layers (posts) throughout accelerated stress testing. IST creates a uniform strain from within the substrate, the interconnects ability to distribute and redistribute this strain provides an indication of integrity. The plated barrels and inner layer junctions are exercised until the initial failure mode/mechanism is uncovered.
Fatigue is generally the failure mechanism associated with high quality interconnect, failures are usually located in the central zone or corners of the
PTH; lower quality interconnect do not have the same ability to redistribute this strain, causing the failure to propagate more rapidly.
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Recent studies have proven that both PTH and post interconnects can precipitate as independent failure mechanisms or can interact to accelerate interconnect failure. IST offers the user a highly accelerated ability to create the necessary mechanical strains and simultaneously monitor both levels of interconnect degradation as they occur.
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Characterizing the interconnects integrity can only be effectively quantified by creating cyclic strain within the interconnect, this strain accelerates the inherent failure mechanisms that could cause the product to fail in the end use environment.